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d a t a sh eet product speci?cation 2003 aug 12 integrated circuits 74LVC4066 quad bilateral switches
2003 aug 12 2 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 features very low on resistance: C 7.5 w (typical) at v cc = 2.7 v C 6.5 w (typical) at v cc = 3.3 v C6 w (typical) at v cc =5v. esd protection: C hbm eia/jesd22-a114-a exceeds 2000 v C mm eia/jesd22-a115-a exceeds 200 v. high noise immunity cmos low power consumption latch up performance exceeds 250 ma complies with jedec standard no. 8-1a direct interface ttl-levels. description the 74LVC4066 is a high-speed si-gate cmos device. the 74LVC4066 has four independent analog switches. each switch has two input/output terminals (ny and nz) and an active high enable input (ne). when ne is low, the analog switch is turned off. quick reference data gnd = 0 v; t amb =25 c; t r =t f 2.5 ns. notes 1. c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n + ((c l +c s ) v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in volts; n = total load switching outputs; c s = switch capacitance. 2. the condition is v i = gnd to v cc . symbol parameter conditions typical unit t pzh /t pzl turn-on time e to v os c l = 50 pf; r l = 500 w ; v cc = 3 v 2.5 ns c l = 50 pf; r l = 500 w ; v cc = 5 v 1.9 ns t phz /t plz turn-off time e to v os c l = 50 pf; r l = 500 w ; v cc = 3 v 3.4 ns c l = 50 pf; r l = 500 w ; v cc = 5 v 2.5 ns c i input capacitance v cc = 3 v 3.5 pf c pd power dissipation capacitance v cc = 3.3 v; notes 1 and 2 12.5 pf c s switch capacitance off-state 8.0 pf on-state 14.0 pf
2003 aug 12 3 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 function table see note 1. note 1. h = high voltage level; l = low voltage level. ordering information input ne switch l off hon type number package temperature range pins package material code 74LVC4066d - 40 to +125 c 14 so14 plastic sot108-2 74LVC4066pw - 40 to +125 c 14 tssop14 plastic sot402-1 74LVC4066bq - 40 to +125 c 14 dhvqfn14 plastic sot762-1 pinning pin symbol description 1 1y independent input/output 2 1z independent output/input 3 2z independent output/input 4 2y independent input/output 5 2e enable input (active high) 6 3e enable input (active high) 7 gnd ground (0 v) 8 3y independent input/output 9 3z independent output/input 10 4z independent output/input 11 4y independent input/output 12 4e enable input (active high) 13 1e enable input (active high) 14 v cc supply voltage handbook, halfpage mnb109 1 2 3 4 5 6 7 8 14 13 12 11 10 9 1y 1z 2z 2y 4066 2e 3e gnd 3y 3z 4z 4y 4e 1e v cc fig.1 pin configuration so14 and tssop14.
2003 aug 12 4 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 handbook, halfpage 114 gnd (1) 1y v cc 7 2 3 4 5 6 1z 2z 2y 2e 3e 13 12 11 10 9 1e 4e 4y 4z 3z 8 gnd top view 3y mnb110 fig.2 pin configuration dhvqfn14. (1) the die substrate is attached to this pad using conductive die attach material. it can not be used as a supply pin or input. handbook, halfpage mnb111 1y 1z 12 2y 2z 43 1e 13 3y 3z 89 4y 4z 11 10 3e 6 4e 12 2e 5 fig.3 logic symbol. mnb112 12 13 # 43 5# 89 6# 11 10 (a) 12 # 12 13 1 x1 1 x1 1 x1 1 1 1 1 1 x1 # 43 5# 89 6# 11 10 (b) 12 # fig.4 logic symbol (ieee/iec). handbook, halfpage mna658 v cc e y z fig.5 logic diagram (one switch).
2003 aug 12 5 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 recommended operating conditions limiting values in accordance with the absolute maximum rating system (iec 60134); voltages are referenced to gnd (ground = 0 v); see note 1. notes 1. to avoid drawing v cc current out of terminal z, when switch current flows in terminal y, the voltage drop across the bidirectional switch must not exceed 0.4 v. if the switch current flows into terminal z, no v cc current will flow out of terminal y. in this case there is no limit for the voltage drop across the switch, but the voltage at y and z may not exceed v cc or gnd. 2. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3. for so14 packages: above 70 c derate linearly with 8 mw/k. for tssop14 packages: above 60 c derate linearly with 5.5 mw/k. for dhvqfn14 packages: above 60 c derate linearly with 4.5 mw/k. symbol parameter conditions min. max. unit v cc supply voltage 1.65 5.5 v v i input voltage 0 5.5 v v s switch voltage 0 v cc v t amb operating ambient temperature - 40 +125 c t r , t f input rise and fall times v cc = 1.65 to 2.7 v 0 20 ns/v v cc = 2.7 to 5.5 v 0 10 ns/v symbol parameter conditions min. max. unit v cc supply voltage - 0.5 +6.5 v v i input voltage note 2 - 0.5 +6.5 v i ik input diode current v i < - 0.5 v or v i >v cc + 0.5 v -- 50 ma i sk switch diode current v i < - 0.5 v or v i >v cc + 0.5 v - 50 ma v s switch voltage enable and disable mode - 0.5 +6.5 v i s switch source or sink current - 0.5 < v s 2003 aug 12 6 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 dc characteristics at recommended operating conditions; voltage are referenced to gnd (groun d=0v). symbol parameter test conditions min. typ. max. unit other v cc (v) t amb = - 40 to +85 c; note 1 v ih high-level input voltage 1.65 to 1.95 0.65v cc -- v 2.3 to 2.7 1.7 -- v 2.7 to 3.6 2.0 -- v 4.5 to 5.5 0.7v cc -- v v il low-level input voltage 1.65 to 1.95 -- 0.35v cc v 2.3 to 2.7 -- 0.7 v 2.7 to 3.6 -- 0.8 v 4.5 to 5.5 -- 0.30v cc v i li input leakage current (control pin) v i = 5.5 v or gnd 5.5 - 0.1 5 m a i s(off) analog switch off-state current v i =v ih or v il ; |v s |=v cc - gnd; see fig.7 5.5 - 0.1 5 m a i s(on) analog switch on-state current v i =v ih or v il ; |v s |=v cc - gnd; see fig.8 5.5 - 0.1 5 m a i cc quiescent supply current v i =v cc or gnd; v s = gnd or v cc ; i o =0a 5.5 - 0.1 10 m a d i cc additional quiescent supply current per control pin v i =v cc - 0.6 v; v s = gnd or v cc ; i o =0a 5.5 - 5 500 m a
2003 aug 12 7 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 note 1. all typical values are measured at t amb =25 c. t amb = - 40 to +125 c v ih high-level input voltage 1.65 to 1.95 0.65v cc -- v 2.3 to 2.7 1.7 -- v 2.7 to 3.6 2.0 -- v 4.5 to 5.5 0.7v cc -- v v il low-level input voltage 1.65 to 1.95 -- 0.35v cc v 2.3 to 2.7 -- 0.7 v 2.7 to 3.6 -- 0.8 v 4.5 to 5.5 -- 0.30v cc v i li input leakage current (control pin) v i = 5.5 v or gnd 5.5 -- 20 m a i s(off) analog switch off-state current v i =v ih or v il ; |v s |=v cc - gnd; see fig.7 5.5 -- 20 m a i s(on) analog switch on-state current v i =v ih or v il ; |v s |=v cc - gnd; see fig.8 5.5 -- 20 m a i cc quiescent supply current v i =v cc or gnd; v s = gnd or v cc ; i o =0a 5.5 -- 40 m a d i cc additional quiescent supply current per control pin v i =v cc - 0.6 v; v s = gnd or v cc ; i o =0a 5.5 -- 5000 m a symbol parameter test conditions min. typ. max. unit other v cc (v)
2003 aug 12 8 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 resistance r on symbol parameter test conditions min. typ. max. unit other i s (ma) v cc (v) t amb = - 40 to +85 c ; note 1; see fig.6 r on(peak) on-resistance (peak) v s = gnd to v cc ; v i =v ih 4 1.65 to 1.95 - 35 100 w 8 2.3 to 2.7 - 14 30 w 12 2.7 - 11.5 25 w 24 3.0 to 3.6 - 8.5 20 w 32 4.5 to 5.5 - 6.5 15 w r on(rail) on-resistance (rail) v s = gnd; v i =v ih 4 1.65 to 1.95 - 10 30 w 8 2.3 to 2.7 - 8.5 20 w 12 2.7 - 7.5 18 w 24 3.0 to 3.6 - 6.5 15 w 32 4.5 to 5.5 - 610 w v s =v cc ; v i =v ih 4 1.65 to 1.95 - 12 30 w 8 2.3 to 2.7 - 8.5 20 w 12 2.7 - 7.5 18 w 24 3.0 to 3.6 - 6.5 15 w 32 4.5 to 5.5 - 610 w r on(?atness) on-resistance (?atness) v s = gnd to v cc ; v i =v ih ; see figs.10 to 13 4 1.8 - 100 -w 8 2.5 - 17 -w 12 2.7 - 10 -w 24 3.3 - 5 -w 32 5.0 - 3 -w
2003 aug 12 9 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 note 1. typical value r on(flatness) is measured at t amb = - 40 to +85 c, all other typical values are measured at t amb =25 c. t amb = - 40 to +125 c ; see fig.6 r on(peak) on-resistance (peak) v s = gnd to v cc ; v i =v ih 4 1.65 to 1.95 -- 150 w 8 2.3 to 2.7 -- 45 w 12 2.7 -- 38 w 24 3.0 to 3.6 -- 30 w 32 4.5 to 5.5 -- 23 w r on(rail) on-resistance (rail) v s = gnd; v i =v ih 4 1.65 to 1.95 -- 45 w 8 2.3 to 2.7 -- 30 w 12 2.7 -- 27 w 24 3.0 to 3.6 -- 23 w 32 4.5 to 5.5 -- 15 w v s =v cc ; v i =v ih 4 1.65 to 1.95 -- 45 w 8 2.3 to 2.7 -- 30 w 12 2.7 -- 27 w 24 3.0 to 3.6 -- 23 w 32 4.5 to 5.5 -- 15 w symbol parameter test conditions min. typ. max. unit other i s (ma) v cc (v)
2003 aug 12 10 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 mna659 v yz i s v s = gnd to v cc e v ih gnd gnd fig.6 test circuit for measuring on-state resistance (r on ). mna660 aa y e z v i = v cc or gnd v o = gnd or v cc v il gnd fig.7 test circuit for measuring off-state current. mna661 aa y e z v i = v cc or gnd v o (open circuit) v ih gnd fig.8 test circuit for measuring on-state current. handbook, halfpage 5 0 1234 v i (v) r on ( w ) 10 2 10 1 mna673 v cc = 1.8 v 2.5 v 2.7 v 3.3 v 5.0 v fig.9 typical on-resistance (r on ) as a function of input voltage (v s ) for v s = gnd to v cc .
2003 aug 12 11 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 handbook, halfpage 0 01 3 15 5 10 2 v l (v) r on ( w ) mna663 t amb = + 85 c + 25 c - 40 c fig.10 r on for v cc = 2.5 v. handbook, halfpage 0 01 3 15 5 10 2 v l (v) r on ( w ) mna664 t amb = + 85 c + 25 c - 40 c fig.11 r on for v cc = 2.7 v. handbook, halfpage 012 4 10 0 8 3 6 4 2 mna665 v l (v) r on ( w ) + 85 c t amb = + 25 c - 40 c fig.12 r on for v cc = 3.3 v. handbook, halfpage 05 8 2 4 6 3 5 7 1234 mna666 v i (v) r on ( w ) t amb = + 85 c + 25 c - 40 c fig.13 r on for v cc = 5.0 v.
2003 aug 12 12 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 ac characteristics gnd = 0 v. notes 1. all typical values are measured at t amb =25 c. 2. t phl /t plh propagation delay is the calculated rc time constant of the typical on-state resistance of the switch and the specified capacitance when driven by an ideal voltage source (zero output impedance). symbol parameter test conditions min. typ. max. unit waveforms v cc (v) t amb = - 40 to +85 c ; note 1 t phl /t plh propagation delay ny to nz or nz to ny see figs 14 and 16; note 2 1.65 to 1.95 - 0.8 2.0 ns 2.3 to 2.7 - 0.4 1.2 ns 2.7 - 0.4 1.0 ns 3.0 to 3.6 - 0.3 0.8 ns 4.5 to 5.5 - 0.2 0.6 ns t pzh /t pzl turn-on time e to v os see figs 15 and 16 1.65 to 1.95 1.0 5.3 10 ns 2.3 to 2.7 1.0 3.0 5.6 ns 2.7 1.0 2.6 5.0 ns 3.0 to 3.6 1.0 2.5 4.4 ns 4.5 to 5.5 1.0 1.9 3.9 ns t phz /t plz turn-off time e to v os see figs 15 and 16 1.65 to 1.95 1.0 4.2 9.0 ns 2.3 to 2.7 1.0 2.4 5.5 ns 2.7 1.0 3.6 6.5 ns 3.0 to 3.6 1.0 3.4 6.0 ns 4.5 to 5.5 1.0 2.5 5.0 ns t amb = - 40 to +125 c t phl /t plh propagation delay ny to nz or nz to ny see figs 14 and 16; note 2 1.65 to 1.95 -- 3.0 ns 2.3 to 2.7 -- 2.0 ns 2.7 -- 1.5 ns 3.0 to 3.6 -- 1.5 ns 4.5 to 5.5 -- 1.0 ns t pzh /t pzl turn-on time e to v os see figs 15 and 16 1.65 to 1.95 1.0 - 12.5 ns 2.3 to 2.7 1.0 - 7.0 ns 2.7 1.0 - 6.5 ns 3.0 to 3.6 1.0 - 5.5 ns 4.5 to 5.5 1.0 - 5.0 ns t phz /t plz turn-off time e to v os see figs 15 and 16 1.65 to 1.95 1.0 - 11.5 ns 2.3 to 2.7 1.0 - 7.0 ns 2.7 1.0 - 8.5 ns 3.0 to 3.6 1.0 - 7.5 ns 4.5 to 5.5 1.0 - 6.5 ns
2003 aug 12 13 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 ac waveforms handbook, halfpage mna667 t phl t plh v m v m y or z z or y gnd v i v oh v ol fig.14 the input (v s ) to output (v o ) propagation delays. v ol and v oh are typical output voltage drop that occur with the output load. v cc v m input v i t r =t f 1.65 to 1.95 v 0.5v cc v cc 2.0 ns 2.3 to 2.7 v 0.5v cc v cc 2.0 ns 2.7 and 3.0 to 3.6 v 1.5 v 2.7 v 2.5 ns 4.5 to 5.5 v 0.5v cc v cc 2.5 ns
2003 aug 12 14 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 handbook, full pagewidth mna668 t plz t phz switch disabled switch enabled v y v x switch enabled output low-to-off off-to-low output high-to-off off-to-high e y or z y or z v i v ol v oh v cc v m gnd gnd t pzl t pzh v m v m fig.15 turn-on and turn-off times. v ol and v oh are typical output voltage drop that occur with the output load. v x =v ol + 0.3 v at v cc 3 2.7 v; v x =v ol + 0.1 v cc at v cc < 2.7 v; v y =v oh - 0.3 v at v cc 3 2.7 v; v y =v oh - 0.1 v cc at v cc < 2.7 v. v cc v m input v i t r =t f 1.65 to 1.95 v 0.5v cc v cc 2.0 ns 2.3 to 2.7 v 0.5v cc v cc 2.0 ns 2.7 and 3.0 to 3.6 v 1.5 v 2.7 v 2.5 ns 4.5 to 5.5 v 0.5v cc v cc 2.5 ns
2003 aug 12 15 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 handbook, full pagewidth v ext v cc v i v o mna616 d.u.t. c l r t r l r l pulse generator v cc v i c l r l v ext t plh /t phl t pzh /t phz t pzl /t plz 1.65 to 1.95 v v cc 30 pf 1 k w open gnd 2v cc 2.3 to 2.7 v v cc 30 pf 500 w open gnd 2v cc 2.7 and 3.0 to 3.6 v 2.7 v 50 pf 500 w open gnd 6 v 4.5 to 5.5 v v cc 50 pf 500 w open gnd 2v cc definitions for test circuits: r l = load resistor. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. fig.16 load circuitry for switching times. additional ac characteristics recommended conditions and typical values at t amb =25 c. symbol parameter test conditions v cc (v) typical unit d sin sine-wave distortion r l =10k w ;c l = 50 pf; f in = 1 khz; see fig.18 1.65 0.032 % 2.3 0.008 % 3 0.006 % 4.5 0.005 % r l =10k w ; c l = 50 pf; f in = 10 khz; see fig.18 1.65 0.068 % 2.3 0.009 % 3 0.008 % 4.5 0.006 % f on switch on signal frequency response r l = 600 w ; c l = 50 pf; see fig.17; note 1 1.65 170 mhz 2.3 210 mhz 3 212 mhz 4.5 215 mhz r l =50 w ; c l = 5 pf; see fig.17; note 1 1.65 > 500 mhz 2.3 > 500 mhz 3 > 500 mhz 4.5 > 500 mhz
2003 aug 12 16 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 notes 1. adjust f in voltage to obtain 0 dbm level at output. increase f in frequency until db meter reads - 3 db. 2. adjust f in voltage to obtain 0 dbm level at input. 3. guaranteed by design. a off(feedthru) switch off signal feed-through attenuation r l = 600 w ; c l =50pf; f in = 1 mhz; see fig.19; note 2 1.65 - 46 db 2.3 - 46 db 3 - 46 db 4.5 - 46 db r l =50 w ; c l = 5 pf; f in = 1 mhz; see fig.19; note 2 1.65 - 42 db 2.3 - 42 db 3 - 42 db 4.5 - 42 db a ct(e-y/z) crosstalk between control input to signal output r l = 600 w ; c l =50pf; f in = 1 mhz; t r =t f = 2 ns; see fig.20 1.65 69 mv 2.3 87 mv 3 156 mv 4.5 302 mv a ct(s) crosstalk between switches) r l = 600 w ; c l =50pf; f in = 1 mhz; see fig.21 1.65 - 58 db 2.3 - 58 db 3 - 58 db 4.5 - 58 db r l =50 w ; c l = 5 pf; f in = 1 mhz; see fig.21 1.65 - 58 db 2.3 - 58 db 3 - 58 db 4.5 - 58 db c pd power dissipation capacitance f in = 10 mhz 2.5 11.0 pf 3.3 12.5 pf 5.0 15.6 pf q charge injection c l = 0.1 nf; v gen =0v;r gen =0 w ; f = 1 mhz; r l =1m w ; see fig.22; note 3 3.3 0.8 pc 5.5 1.2 pc symbol parameter test conditions v cc (v) typical unit handbook, full pagewidth mna669 0.1 m f r l v o 1/2v cc c l db z/y y/z channel on e v ih f in 50 w fig.17 test circuit for measuring the frequency response when switch is on.
2003 aug 12 17 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 handbook, full pagewidth mna670 10 m f r l v o 1/2v cc c l distortion meter z/y y/z f in channel on e v ih 600 w fig.18 test circuit for measuring sine-wave distortion. v cc v ih 1.65 v 1.4 v (p-p) 2.3 v 2 v (p-p) 3 v 2.5 v (p-p) 4. v 4 v (p-p) handbook, full pagewidth mnb113 0.1 m f r l r l v o 1/2v cc 1/2v cc c l db z/y y/z channel off e v il f in 50 w fig.19 test circuit for measuring feed-through when switch is off. handbook, full pagewidth mna672 r l r in v o 1/2v cc 1/2v cc c l 50 pf z/y y/z e 600 w 50 w 600 w fig.20 crosstalk between control input to signal output.
2003 aug 12 18 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 handbook, full pagewidth mnb114 0.1 m f r l 600 w r in v o1 1/2v cc c l 50 pf 1y or 1z 1z or 1y channel on e1 v ih f in 50 w 600 w r l 600 w v o2 1/2v cc c l 50 pf 2y or 2z 2z or 2y channel off e2 v il r in 600 w fig.21 crosstalk between switches. handbook, full pagewidth mna675 on off logic input (e) v o d v out off handbook, full pagewidth mna674 r l v o c l r gen v gen logic input 1 m w 0.1 nf z/y y/z e fig.22 charge injection test. q= d v out c l
2003 aug 12 19 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 package outlines unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p z y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.55 1.40 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot108-2 x w m q a a 1 a 2 b p d h e l p detail x e z e c l v m a (a ) 3 a 7 8 1 14 y ms-012 pin 1 index 0.069 0.010 0.004 0.061 0.055 0.01 0.019 0.014 0.0100 0.0075 0.35 0.34 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 01-05-29 03-02-19 0 2.5 5 mm scale so14: plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm sot108-2
2003 aug 12 20 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.72 0.38 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot402-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 17 14 8 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm sot402-1 a max. 1.1 pin 1 index
2003 aug 12 21 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.1 2.9 d h 1.65 1.35 y 1 2.6 2.4 1.15 0.85 e 1 2 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot762-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot762-1 dhvqfn14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 26 13 9 8 7 1 14 x d e c b a 02-10-17 03-01-27 terminal 1 index area a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
2003 aug 12 22 philips semiconductors product speci?cation quad bilateral switches 74LVC4066 data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
? koninklijke philips electronics n.v. 2003 sca75 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands 613508/01/pp 23 date of release: 2003 aug 12 document order number: 9397 750 11652

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